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df32a77
minor
xuchang-vivo Jan 26, 2026
d32a02e
minor
xuchang-vivo Jan 27, 2026
08db650
minor
xuchang-vivo Jan 30, 2026
522d981
minor
xuchang-vivo Feb 2, 2026
b983588
laji
xuchang-vivo Feb 11, 2026
be8a54f
wip
xuchang-vivo Feb 12, 2026
b0906eb
minor
xuchang-vivo Feb 12, 2026
5bf7855
add intr
xuchang-vivo Feb 24, 2026
188fa62
minor
xuchang-vivo Feb 24, 2026
a4a053e
minor
xuchang-vivo Feb 24, 2026
4f3fdcc
minor
xuchang-vivo Feb 24, 2026
b87cdb6
minor
xuchang-vivo Feb 24, 2026
6cfc9a9
del idf deps
xuchang-vivo Feb 24, 2026
51ebf12
add riscv kconfig
xuchang-vivo Feb 25, 2026
b31e749
set mie
xuchang-vivo Feb 25, 2026
d66be8e
minor
xuchang-vivo Feb 25, 2026
1ce0425
minor
xuchang-vivo Feb 25, 2026
3af91c9
minor
xuchang-vivo Feb 25, 2026
410d64a
minor
xuchang-vivo Feb 25, 2026
5f27e0d
minor
xuchang-vivo Feb 25, 2026
93a386a
minor
xuchang-vivo Feb 25, 2026
61cad70
minor
xuchang-vivo Feb 25, 2026
5ad8675
minor
xuchang-vivo Feb 25, 2026
a7c7f77
minor
xuchang-vivo Feb 25, 2026
d6498c8
make fifo tx enable
xuchang-vivo Feb 25, 2026
e7aadfc
disable wdt
xuchang-vivo Feb 25, 2026
c71d44e
add intc
xuchang-vivo Feb 26, 2026
c8b0a88
minor
xuchang-vivo Feb 26, 2026
7685348
add copyright
xuchang-vivo Feb 27, 2026
472bfff
add link.x
xuchang-vivo Feb 27, 2026
bc8be07
make mtime optional
xuchang-vivo Feb 27, 2026
b146042
minor
xuchang-vivo Feb 27, 2026
29179e2
Apply suggestion from @lawkai-vivo
lawkai-vivo Feb 27, 2026
06a314f
Update kconfig/config/seeed_xiao_esp32c3/debug/defconfig
lawkai-vivo Feb 27, 2026
f52645a
Update driver/src/systimer/esp32_sys_timer.rs
xuchang-vivo Feb 28, 2026
19afb4c
Update driver/src/systimer/esp32_sys_timer.rs
xuchang-vivo Feb 28, 2026
4a549a0
add unittest_kernel
xuchang-vivo Feb 28, 2026
2445235
fix bug
xuchang-vivo Feb 28, 2026
563936f
set unittest thread num options
xuchang-vivo Mar 2, 2026
632cbb0
fix
xuchang-vivo Mar 4, 2026
da57e7c
del unncessary logic
xuchang-vivo Mar 4, 2026
90d10f1
minor
xuchang-vivo Mar 4, 2026
5a60b80
add check_all
xuchang-vivo Mar 6, 2026
d6f0a09
del kconfig.test
xuchang-vivo Mar 6, 2026
287a38e
fix compile error
xuchang-vivo Mar 6, 2026
d63e450
minor
xuchang-vivo Mar 6, 2026
9e845ac
minor
xuchang-vivo Mar 6, 2026
262ea0b
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
193baea
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
8ec65b8
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
121354d
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
7e30211
fix
xuchang-vivo Mar 6, 2026
bf9adfe
add compensation
xuchang-vivo Mar 9, 2026
101242c
minor
xuchang-vivo Mar 9, 2026
035a5db
fix test_timer_timeout_accuracy
xuchang-vivo Mar 10, 2026
874f231
minor
xuchang-vivo Mar 10, 2026
18c529f
minor
xuchang-vivo Mar 11, 2026
cadfb06
let mutex wait
xuchang-vivo Mar 11, 2026
92b6e40
del unnecessary logic
xuchang-vivo Mar 11, 2026
7c6a8ce
add compensation
xuchang-vivo Mar 11, 2026
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8 changes: 7 additions & 1 deletion arch/riscv/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -19,5 +19,11 @@ config HAS_MIE
default n
help
Whether the platform supports the MIE.


config HAS_MTIME
bool "MTIME supports"
default n
help
Whether the platform supports the MTIME.

endmenu
84 changes: 84 additions & 0 deletions driver/src/interrupt_controller/esp32_intc.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,84 @@
// Copyright (c) 2026 vivo Mobile Communication Co., Ltd.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

use tock_registers::{
interfaces::{ReadWriteable, Readable, Writeable},
register_bitfields, register_structs,
registers::ReadWrite,
};

use crate::{
interrupt_controller::Interrupt, static_ref::StaticRef,
uart::esp32_usb_serial::JFIFO_ST_REG::OUT_FIFO_FULL,
};

register_structs! {
pub IntcRegisters {
(0x000 => _reserved0),
(0x104 => cpu_int_enable_reg: ReadWrite<u32>),
(0x108 => _reserved1),
(0x118 => priority_reg: [ReadWrite<u32, PRIORITY_REG::Register>; 31]),
(0x194 => threshold_reg: ReadWrite<u32, THRESHOLD_REG::Register>),
(0x198 => @END),
}
}

register_bitfields! [
u32,

pub PRIORITY_REG [
PRIORITY OFFSET(0) NUMBITS(4) [],
],

pub THRESHOLD_REG [
THRESHOLD OFFSET(0) NUMBITS(4) [],
],
];

pub struct Esp32Intc {
registers: StaticRef<IntcRegisters>,
}

impl Esp32Intc {
pub const fn new(base: usize) -> Self {
Self {
registers: unsafe { StaticRef::new(base as *const IntcRegisters) },
}
}

pub fn allocate_irq(&self, irq: Interrupt) {
let mut map_reg =
self.registers.inner() as *const IntcRegisters as usize + irq.source_no * 4;
unsafe {
core::ptr::write_volatile(map_reg as *mut u32, irq.irq_no as u32);
}
}

pub fn enable_irq(&self, irq: Interrupt) {
let mut enable_reg = self.registers.cpu_int_enable_reg.get();
enable_reg |= 1 << irq.irq_no;
self.registers.cpu_int_enable_reg.set(enable_reg);
}

pub fn set_priority(&self, irq: Interrupt, priority: u8) {
self.registers.priority_reg[(irq.irq_no - 1) as usize]
.write(PRIORITY_REG::PRIORITY.val(priority as u32));
}

pub fn set_threshold(&self, threshold: u8) {
self.registers
.threshold_reg
.write(THRESHOLD_REG::THRESHOLD.val(threshold as u32));
}
}
27 changes: 27 additions & 0 deletions driver/src/interrupt_controller/mod.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
// Copyright (c) 2026 vivo Mobile Communication Co., Ltd.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

#[cfg(target_chip = "esp32c3")]
pub mod esp32_intc;

pub struct Interrupt {
pub(crate) source_no: usize,
pub(crate) irq_no: usize,
}

impl Interrupt {
pub const fn new(source_no: usize, irq_no: usize) -> Self {
Self { source_no, irq_no }
}
}
2 changes: 2 additions & 0 deletions driver/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,9 @@

pub mod clock_control;
pub mod i2c;
pub mod interrupt_controller;
pub mod pinctrl;
pub mod reset;
pub mod static_ref;
pub mod systimer;
pub mod uart;
4 changes: 4 additions & 0 deletions driver/src/static_ref.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,10 @@ impl<T> StaticRef<T> {
ptr: NonNull::new_unchecked(ptr.cast_mut()),
}
}

pub fn inner(&self) -> *const T {
self.ptr.as_ptr()
}
}

impl<T> Clone for StaticRef<T> {
Expand Down
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