Fix incorrect VM Attributes being applied for mapping frames to x86 EPT

crates/sel4-capdl-initializer/src/initialize.rs

@@ -554,7 +554,7 @@ impl<'a> Initializer<'a> {
             init_thread::slot::VSPACE.cap(),
             self.copy_addrs.select(frame_object_type),
             CapRights::read_write(),
-            vm_attributes_from_whether_cached_and_exec(true, false),
+            vm_attributes_from_whether_cached_and_exec(true, false, false),
         )?;
         for entry in fill.iter() {
             let range = try_into_usize_range(&archived_range_to_range(&entry.range)).unwrap();
@@ -628,16 +628,20 @@ impl<'a> Initializer<'a> {
                 PageTableEntry::Frame(cap) => {
                     let frame = self.orig_cap::<cap_type::UnspecifiedPage>(cap.object);
                     let rights = cap.rights.to_sel4();
-                    self.copy(frame)?
-                        .ept_frame_map(eptpml4, vaddr, rights, cap.vm_attributes())?;
+                    self.copy(frame)?.ept_frame_map(
+                        eptpml4,
+                        vaddr,
+                        rights,
+                        cap.vm_attributes(true),
+                    )?;
                 }
                 PageTableEntry::PageTable(cap) => {
                     self.orig_cap::<cap_type::UnspecifiedIntermediateTranslationTable>(cap.object)
                         .ept_intermediate_translation_table_map(
                             sel4::TranslationTableObjectType::from_level_ept(level + 1).unwrap(),
                             eptpml4,
                             vaddr,
-                            cap.vm_attributes(),
+                            cap.vm_attributes(true),
                         )?;
                     let obj = self.object_as::<object::ArchivedPageTable>(cap.object);
                     self.init_vspace_x86_ept(eptpml4, level + 1, vaddr, obj)?;
@@ -661,15 +665,15 @@ impl<'a> Initializer<'a> {
                     let frame = self.orig_cap::<cap_type::UnspecifiedPage>(cap.object);
                     let rights = cap.rights.to_sel4();
                     self.copy(frame)?
-                        .frame_map(vspace, vaddr, rights, cap.vm_attributes())?;
+                        .frame_map(vspace, vaddr, rights, cap.vm_attributes(false))?;
                 }
                 PageTableEntry::PageTable(cap) => {
                     self.orig_cap::<cap_type::UnspecifiedIntermediateTranslationTable>(cap.object)
                         .generic_intermediate_translation_table_map(
                             sel4::TranslationTableObjectType::from_level(level + 1).unwrap(),
                             vspace,
                             vaddr,
-                            cap.vm_attributes(),
+                            cap.vm_attributes(false),
                         )?;
                     let obj = self.object_as::<object::ArchivedPageTable>(cap.object);
                     self.init_vspace(vspace, level + 1, vaddr, obj)?;

crates/sel4-capdl-initializer/types/src/when_sel4.rs

@@ -129,17 +129,17 @@ impl ArchivedFillEntryContentBootInfoId {
 }
 
 pub trait HasVmAttributes {
-    fn vm_attributes(&self) -> VmAttributes;
+    fn vm_attributes(&self, is_x86_ept: bool) -> VmAttributes;
 }
 
 impl HasVmAttributes for cap::ArchivedFrame {
-    fn vm_attributes(&self) -> VmAttributes {
-        vm_attributes_from_whether_cached_and_exec(self.cached, self.executable)
+    fn vm_attributes(&self, is_x86_ept: bool) -> VmAttributes {
+        vm_attributes_from_whether_cached_and_exec(self.cached, self.executable, is_x86_ept)
     }
 }
 
 impl HasVmAttributes for cap::ArchivedPageTable {
-    fn vm_attributes(&self) -> VmAttributes {
+    fn vm_attributes(&self, _is_x86_ept: bool) -> VmAttributes {
         default_vm_attributes_for_page_table()
     }
 }
@@ -159,14 +159,38 @@ sel4::sel4_cfg_if! {
     }
 }
 
+sel4::sel4_cfg_if! {
+    if #[sel4_cfg(all(ARCH_X86_64, VTX))] {
+        const EPT_CACHED: VmAttributes = VmAttributes::EPT_DEFAULT;
+        const EPT_UNCACHED: VmAttributes = VmAttributes::EPT_CACHE_DISABLED;
+    }
+}
+
 // Allow these because on some architectures, certain variables are not touched.
 #[allow(unused_variables, unused_assignments)]
-pub fn vm_attributes_from_whether_cached_and_exec(cached: bool, executable: bool) -> VmAttributes {
+pub fn vm_attributes_from_whether_cached_and_exec(
+    cached: bool,
+    executable: bool,
+    x86_ept: bool,
+) -> VmAttributes {
     let mut vmattr = VmAttributes::NONE;
-    if cached {
-        vmattr = CACHED;
+
+    if x86_ept {
+        sel4::sel4_cfg_if! {
+            if #[sel4_cfg(all(ARCH_X86_64, VTX))] {
+                if cached {
+                    vmattr = EPT_CACHED;
+                } else {
+                    vmattr = EPT_UNCACHED;
+                }
+            }
+        }
     } else {
-        vmattr = UNCACHED;
+        if cached {
+            vmattr = CACHED;
+        } else {
+            vmattr = UNCACHED;
+        }
     }
 
     sel4::sel4_cfg_if! {

crates/sel4/sys/build/xml/invocations/mod.rs

@@ -547,6 +547,7 @@ impl ParameterTypes {
 
         if sel4_cfg_bool!(ARCH_X86_64) {
             this.insert_enum("seL4_X86_VMAttributes", WORD_SIZE);
+            this.insert_enum("seL4_X86_EPT_VMAttributes", WORD_SIZE);
             this.insert_capability("seL4_X86_IOPort");
             this.insert_capability("seL4_X86_IOPortControl");
             this.insert_capability("seL4_X86_ASIDControl");