[linux-nvidia-6.17-next] Add CXL Type-2 device support and CXL RAS error handling#323

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JiandiAnNVIDIA wants to merge 80 commits intoNVIDIA:24.04_linux-nvidia-6.17-nextfrom

JiandiAnNVIDIA:cxl_2026-02-16

Commits on Feb 20, 2026

Revert "NVIDIA: VR: SAUCE: cxl: add support for cxl reset"
JiandiAnNVIDIA
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cxl/hdm: Use str_plural() to simplify the code

Xichao Zhao
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cxl/region: use str_enabled_disabled() instead of ternary operator

SimoneCheng
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cxl: Move hpa_to_spa callback to a new root decoder ops structure

AlisonSchofield
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cxl: Define a SPA->CXL HPA root decoder callback for XOR Math

AlisonSchofield
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cxl/region: Introduce SPA to DPA address translation

AlisonSchofield
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cxl/core: Add locked variants of the poison inject and clear funcs

AlisonSchofield
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cxl/region: Add inject and clear poison by region offset

AlisonSchofield
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cxl: Fix emit of type resource_size_t argument for validate_region_offset()

davejiang
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mm/memory_hotplug: Update comment for hotplug memory callback priorities

davejiang
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drivers/base/node: Add a helper function node_update_perf_attrs()

davejiang
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cxl, acpi/hmat: Update CXL access coordinates directly instead of through HMAT

davejiang
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acpi/hmat: Remove now unused hmat_update_target_coordinates()

davejiang
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Documentation/driver-api: Fix typo error in cxl

rakurame96
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cxl/acpi: Rename CFMW coherency restrictions

Davidlohr Bueso
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cxl: Documentation/driver-api/cxl: Describe the x86 Low Memory Hole solution

fdefranc
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cxl: Add helper to detect top of CXL device topology

davejiang
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cxl: Add helper to delete dport

davejiang
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cxl: Add a cached copy of target_map to cxl_decoder

davejiang
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cxl/test: Refactor decoder setup to reduce cxl_test burden

davejiang
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cxl: Defer dport allocation for switch ports

davejiang
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Commits on Feb 27, 2026

cxl/port: Fix target list setup for multiple decoders sharing the same dport

Robert Richter
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cxl/test: Add mock version of devm_cxl_add_dport_by_dev()

davejiang
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cxl/test: Adjust the mock version of devm_cxl_switch_port_decoders_setup()

davejiang
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cxl/test: Setup target_map for cxl_test decoder initialization

davejiang
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cxl: Change sslbis handler to only handle single dport

davejiang
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cxl: Move port register setup to when first dport appear

davejiang
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cxl/port: Avoid missing port component registers setup

MingLi-4
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cxl/region: Use %pa printk format to emit resource_size_t

AlisonSchofield
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NVIDIA: VR: SAUCE: CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h

ktbowman
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NVIDIA: VR: SAUCE: PCI/CXL: Introduce pcie_is_cxl()

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Remove unnecessary CXL Endpoint handling helper functions

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Remove unnecessary CXL RCH handling helper functions

ktbowman
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NVIDIA: VR: SAUCE: cxl: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c

davejiang
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NVIDIA: VR: SAUCE: cxl: Move CXL driver's RCH error handling into core/ras_rch.c

ktbowman
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NVIDIA: VR: SAUCE: CXL/AER: Replace device_lock() in cxl_rch_handle_error_iter() with guard() lock

ktbowman
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NVIDIA: VR: SAUCE: CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c

ktbowman
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NVIDIA: VR: SAUCE: PCI/AER: Report CXL or PCIe bus error type in trace logging

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Update RAS handler interfaces to also support CXL Ports

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Log message if RAS registers are unmapped

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers

ktbowman
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NVIDIA: VR: SAUCE: CXL/PCI: Introduce PCI_ERS_RESULT_PANIC

ktbowman
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NVIDIA: VR: SAUCE: CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors

ktbowman
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NVIDIA: VR: SAUCE: cxl: Introduce cxl_pci_drv_bound() to check for bound driver

ktbowman
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NVIDIA: VR: SAUCE: cxl: Change CXL handlers to use guard() instead of scoped_guard()

ktbowman
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NVIDIA: VR: SAUCE: cxl/pci: Introduce CXL protocol error handlers for Endpoints

ktbowman
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NVIDIA: VR: SAUCE: CXL/PCI: Introduce CXL Port protocol error handlers

ktbowman
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NVIDIA: VR: SAUCE: PCI/AER: Dequeue forwarded CXL error

ktbowman
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NVIDIA: VR: SAUCE: CXL/PCI: Export and rename merge_result() to pci_ers_merge_result()

ktbowman
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NVIDIA: VR: SAUCE: CXL/PCI: Introduce CXL uncorrectable protocol error recovery

ktbowman
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NVIDIA: VR: SAUCE: CXL/PCI: Enable CXL protocol errors during CXL Port probe

ktbowman
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NVIDIA: VR: SAUCE: CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup

ktbowman
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NVIDIA: VR: SAUCE: cxl/mem: Arrange for always-synchronous memdev attach

Dan Williams
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NVIDIA: VR: SAUCE: cxl/port: Arrange for always synchronous endpoint attach

djbw
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NVIDIA: VR: SAUCE: cxl/mem: Introduce a memdev creation ->probe() operation

djbw
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NVIDIA: VR: SAUCE: cxl: Add type2 device basic support

alucerop
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NVIDIA: VR: SAUCE: sfc: add cxl support

alucerop
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JiandiAnNVIDIA
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NVIDIA: VR: SAUCE: cxl: Move pci generic code

alucerop
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NVIDIA: VR: SAUCE: cxl/sfc: Map cxl component regs

alucerop
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NVIDIA: VR: SAUCE: cxl/sfc: Initialize dpa without a mailbox

alucerop
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NVIDIA: VR: SAUCE: cxl: Prepare memdev creation for type2

alucerop
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NVIDIA: VR: SAUCE: sfc: create type2 cxl memdev

alucerop
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NVIDIA: VR: SAUCE: cxl/hdm: Add support for getting region from committed decoder

alucerop
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NVIDIA: VR: SAUCE: cxl: Add function for obtaining region range

alucerop
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NVIDIA: VR: SAUCE: cxl: Export functions for unwinding cxl by accelerators

alucerop
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NVIDIA: VR: SAUCE: sfc: obtain decoder and region if committed by firmware

alucerop
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NVIDIA: VR: SAUCE: cxl: Define a driver interface for HPA free space enumeration

alucerop
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NVIDIA: VR: SAUCE: sfc: get root decoder

alucerop
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JiandiAnNVIDIA
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NVIDIA: VR: SAUCE: cxl: Define a driver interface for DPA allocation

alucerop
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JiandiAnNVIDIA
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NVIDIA: VR: SAUCE: sfc: get endpoint decoder

alucerop
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JiandiAnNVIDIA
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NVIDIA: VR: SAUCE: cxl: Make region type based on endpoint type

alucerop
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NVIDIA: VR: SAUCE: cxl/region: Factor out interleave ways setup

alucerop
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NVIDIA: VR: SAUCE: cxl/region: Factor out interleave granularity setup

alucerop
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JiandiAnNVIDIA
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NVIDIA: VR: SAUCE: cxl: Allow region creation by type2 drivers

alucerop
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JiandiAnNVIDIA
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Commits on Mar 2, 2026