Work-In-Progress
SISC-F stands for Specialized Instruction Set Computer F (hex 15).
It's supposed to be some kind of RISC architecture with some specialized instructions, such as calculate matrix, hash and could provide some hardware accelleration for certian things.
Litex builds the gateware but not the software due to no c/c++ compiler existing for SISC-F. I'm working on it.
This project is Open Source Hardware and is licensed under the CERN Open Hardware Licence Version 2 – Weakly Reciprocal (CERN-OHL-W v2).
The license I chose is Weakly Reciprocal, meaning that you must:
- Keep the copyright header in the files
- You have to open source any changes made to the CPU but you don't have to open source the rest of the project. This means that any bugfix or feature added will be contributed back to the community in some way or another without having to open source proprietary hardware implementations.
Copyright (c) 2026 Francesco Angeloni
SPDX-License-Identifier: CERN-OHL-W-2.0