From b22ce6da92f2fca793fa17aeaa0d5399f40f8987 Mon Sep 17 00:00:00 2001 From: Daniel Leung Date: Wed, 8 Nov 2023 16:51:40 -0800 Subject: [PATCH 01/14] zephyr: cpu: use arch_cpu_start instead of arch_start_cpu This uses arch_cpu_start() instead of arch_start_cpu() as it has been renamed to align with the CPU namespace. Signed-off-by: Daniel Leung --- zephyr/lib/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/zephyr/lib/cpu.c b/zephyr/lib/cpu.c index 3dde19dc38bc..8efe99c1532f 100644 --- a/zephyr/lib/cpu.c +++ b/zephyr/lib/cpu.c @@ -155,7 +155,7 @@ int cpu_enable_core(int id) atomic_clear(&start_flag); atomic_clear(&ready_flag); - arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, + arch_cpu_start(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, secondary_init, &start_flag); while (!atomic_get(&ready_flag)) @@ -255,7 +255,7 @@ int cpu_enable_secondary_core(int id) atomic_clear(&start_flag); atomic_clear(&ready_flag); - arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, + arch_cpu_start(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, secondary_init, &start_flag); while (!atomic_get(&ready_flag)) From 11c251a506ea171831fd04f1c5b0c2e94eade396 Mon Sep 17 00:00:00 2001 From: Daniel Leung Date: Fri, 3 Nov 2023 11:57:30 -0700 Subject: [PATCH 02/14] zephyr: use k_smp_cpu_start/_resume for secondary core power up This changes the seconday core power up routine to use the newly introduced k_smp_cpu_start() and k_smp_cpu_resume(). This removes the need to mirror part of the SMP start up code from Zephyr, and no longer need to call into Zephyr private kernel code. Signed-off-by: Daniel Leung --- zephyr/lib/cpu.c | 55 +++++++++--------------------------------------- 1 file changed, 10 insertions(+), 45 deletions(-) diff --git a/zephyr/lib/cpu.c b/zephyr/lib/cpu.c index 8efe99c1532f..9424cdc140e2 100644 --- a/zephyr/lib/cpu.c +++ b/zephyr/lib/cpu.c @@ -19,6 +19,7 @@ /* Zephyr includes */ #include #include +#include #include #include @@ -27,37 +28,13 @@ extern K_KERNEL_STACK_ARRAY_DEFINE(z_interrupt_stacks, CONFIG_MP_MAX_NUM_CPUS, CONFIG_ISR_STACK_SIZE); -static atomic_t start_flag; static atomic_t ready_flag; -/* Zephyr kernel_internal.h interface */ -extern void smp_timer_init(void); - -static FUNC_NORETURN void secondary_init(void *arg) +static void secondary_init(void *arg) { - struct k_thread dummy_thread; - - /* - * This is an open-coded version of zephyr/kernel/smp.c - * smp_init_top(). We do this so that we can call SOF - * secondary_core_init() for each core. - */ - atomic_set(&ready_flag, 1); - z_smp_thread_init(arg, &dummy_thread); - smp_timer_init(); secondary_core_init(sof_get()); - -#ifdef CONFIG_THREAD_STACK_INFO - dummy_thread.stack_info.start = (uintptr_t)z_interrupt_stacks + - arch_curr_cpu()->id * Z_KERNEL_STACK_LEN(CONFIG_ISR_STACK_SIZE); - dummy_thread.stack_info.size = Z_KERNEL_STACK_LEN(CONFIG_ISR_STACK_SIZE); -#endif - - z_smp_thread_swap(); - - CODE_UNREACHABLE; /* LCOV_EXCL_LINE */ } #if CONFIG_ZEPHYR_NATIVE_DRIVERS @@ -131,13 +108,10 @@ void cpu_notify_state_exit(enum pm_state state) int cpu_enable_core(int id) { + bool cpu_resume = true; + /* only called from single core, no RMW lock */ __ASSERT_NO_MSG(cpu_is_primary(arch_proc_id())); - /* - * This is an open-coded version of zephyr/kernel/smp.c - * z_smp_start_cpu(). We do this, so we can use a customized - * secondary_init() for SOF. - */ if (arch_cpu_active(id)) return 0; @@ -149,20 +123,19 @@ int cpu_enable_core(int id) * and the idle thread stack. */ if (pm_state_next_get(id)->state == PM_STATE_ACTIVE) - z_init_cpu(id); + cpu_resume = false; #endif - atomic_clear(&start_flag); atomic_clear(&ready_flag); - arch_cpu_start(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, - secondary_init, &start_flag); + if (cpu_resume) + k_smp_cpu_resume(id, secondary_init, NULL, true, false); + else + k_smp_cpu_start(id, secondary_init, NULL); while (!atomic_get(&ready_flag)) k_busy_wait(100); - atomic_set(&start_flag, 1); - return 0; } @@ -248,21 +221,13 @@ int cpu_enable_secondary_core(int id) if (arch_cpu_active(id)) return 0; -#if ZEPHYR_VERSION(3, 0, 99) <= ZEPHYR_VERSION_CODE - z_init_cpu(id); -#endif - - atomic_clear(&start_flag); atomic_clear(&ready_flag); - arch_cpu_start(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, - secondary_init, &start_flag); + k_smp_cpu_start(id, secondary_init, NULL); while (!atomic_get(&ready_flag)) k_busy_wait(100); - atomic_set(&start_flag, 1); - return 0; } From 5553bcfe4aacc8500181800b6a27dbc38e825a39 Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Mon, 22 Jan 2024 12:50:19 -0500 Subject: [PATCH 03/14] app: fix filter in sample.yaml nxp_adsp_imx8ulp needs to be in allowed platforms. Signed-off-by: Anas Nashif --- app/sample.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/app/sample.yaml b/app/sample.yaml index 84a3929a6f7e..f370e42ac8aa 100644 --- a/app/sample.yaml +++ b/app/sample.yaml @@ -11,8 +11,13 @@ tests: tags: sof build_only: true platform_allow: - intel_adsp_cavs25 intel_adsp_ace15_mtpm intel_adsp_ace20_lnl - nxp_adsp_imx8 nxp_adsp_imx8x nxp_adsp_imx8m + - intel_adsp_cavs25 + - intel_adsp_ace15_mtpm + - intel_adsp_ace20_lnl + - nxp_adsp_imx8 + - nxp_adsp_imx8x + - nxp_adsp_imx8m + - nxp_adsp_imx8ulp integration_platforms: - intel_adsp_cavs25 # TGL From b4214e582080103532c89dd68c35a65528c7f139 Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Fri, 1 Dec 2023 07:54:10 -0500 Subject: [PATCH 04/14] zephyr: use arch_xtensa_uncached_ptr/arch_xtensa_cached_ptr Use direct call to function instead of going over a redefine. Signed-off-by: Anas Nashif --- zephyr/lib/alloc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/zephyr/lib/alloc.c b/zephyr/lib/alloc.c index 4c4baa325e6e..cba457ea0613 100644 --- a/zephyr/lib/alloc.c +++ b/zephyr/lib/alloc.c @@ -116,7 +116,7 @@ static inline uintptr_t get_l3_heap_start(void) * - main_fw_load_offset * - main fw size in manifest */ - return (uintptr_t)z_soc_uncached_ptr((__sparse_force void __sparse_cache *) + return (uintptr_t)arch_xtensa_uncached_ptr((__sparse_force void __sparse_cache *) ROUND_UP(IMR_L3_HEAP_BASE, L3_MEM_PAGE_SIZE)); } @@ -146,7 +146,7 @@ static bool is_l3_heap_pointer(void *ptr) uintptr_t l3_heap_end = l3_heap_start + get_l3_heap_size(); if (is_cached(ptr)) - ptr = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)ptr); + ptr = arch_xtensa_uncached_ptr((__sparse_force void __sparse_cache *)ptr); if ((POINTER_TO_UINT(ptr) >= l3_heap_start) && (POINTER_TO_UINT(ptr) < l3_heap_end)) return true; @@ -199,7 +199,7 @@ static void __sparse_cache *heap_alloc_aligned_cached(struct k_heap *h, #ifdef CONFIG_SOF_ZEPHYR_HEAP_CACHED if (ptr) - ptr = z_soc_cached_ptr((__sparse_force void *)ptr); + ptr = arch_xtensa_cached_ptr((__sparse_force void *)ptr); #endif return ptr; @@ -212,7 +212,7 @@ static void heap_free(struct k_heap *h, void *mem) void *mem_uncached; if (is_cached(mem)) { - mem_uncached = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)mem); + mem_uncached = arch_xtensa_uncached_ptr((__sparse_force void __sparse_cache *)mem); sys_cache_data_flush_and_invd_range(mem, sys_heap_usable_size(&h->heap, mem_uncached)); From 7a0ff76e05cab6b1d99767258680a7b8711dd476 Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Thu, 6 Apr 2023 13:13:48 +0000 Subject: [PATCH 05/14] app: zephyr still requires cmake version 3.20.0 Set min. cmake version required to what zephyr uses. Signed-off-by: Anas Nashif --- app/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/app/CMakeLists.txt b/app/CMakeLists.txt index da9db799d387..ed6e53025fed 100644 --- a/app/CMakeLists.txt +++ b/app/CMakeLists.txt @@ -1,6 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 -cmake_minimum_required(VERSION 3.21.0) +cmake_minimum_required(VERSION 3.20.0) find_package(Zephyr HINTS $ENV{ZEPHYR_BASE}) project(sample_sof) From 4d714ec6befe92127d93928657ca22c5c0791807 Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Fri, 26 Jan 2024 13:13:44 +0000 Subject: [PATCH 06/14] Revert "zephyr: use arch_xtensa_uncached_ptr/arch_xtensa_cached_ptr" This reverts commit b4214e582080103532c89dd68c35a65528c7f139. --- zephyr/lib/alloc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/zephyr/lib/alloc.c b/zephyr/lib/alloc.c index cba457ea0613..4c4baa325e6e 100644 --- a/zephyr/lib/alloc.c +++ b/zephyr/lib/alloc.c @@ -116,7 +116,7 @@ static inline uintptr_t get_l3_heap_start(void) * - main_fw_load_offset * - main fw size in manifest */ - return (uintptr_t)arch_xtensa_uncached_ptr((__sparse_force void __sparse_cache *) + return (uintptr_t)z_soc_uncached_ptr((__sparse_force void __sparse_cache *) ROUND_UP(IMR_L3_HEAP_BASE, L3_MEM_PAGE_SIZE)); } @@ -146,7 +146,7 @@ static bool is_l3_heap_pointer(void *ptr) uintptr_t l3_heap_end = l3_heap_start + get_l3_heap_size(); if (is_cached(ptr)) - ptr = arch_xtensa_uncached_ptr((__sparse_force void __sparse_cache *)ptr); + ptr = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)ptr); if ((POINTER_TO_UINT(ptr) >= l3_heap_start) && (POINTER_TO_UINT(ptr) < l3_heap_end)) return true; @@ -199,7 +199,7 @@ static void __sparse_cache *heap_alloc_aligned_cached(struct k_heap *h, #ifdef CONFIG_SOF_ZEPHYR_HEAP_CACHED if (ptr) - ptr = arch_xtensa_cached_ptr((__sparse_force void *)ptr); + ptr = z_soc_cached_ptr((__sparse_force void *)ptr); #endif return ptr; @@ -212,7 +212,7 @@ static void heap_free(struct k_heap *h, void *mem) void *mem_uncached; if (is_cached(mem)) { - mem_uncached = arch_xtensa_uncached_ptr((__sparse_force void __sparse_cache *)mem); + mem_uncached = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)mem); sys_cache_data_flush_and_invd_range(mem, sys_heap_usable_size(&h->heap, mem_uncached)); From 0606152d4aafc1f7ed43df1b1813252bfc74e154 Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Fri, 26 Jan 2024 13:17:46 +0000 Subject: [PATCH 07/14] zephyr: use system cache APIs instead of custom soc calls Use system cache API instead of soc specific calls. Signed-off-by: Anas Nashif --- zephyr/lib/alloc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/zephyr/lib/alloc.c b/zephyr/lib/alloc.c index 4c4baa325e6e..ce0dd5401853 100644 --- a/zephyr/lib/alloc.c +++ b/zephyr/lib/alloc.c @@ -116,7 +116,7 @@ static inline uintptr_t get_l3_heap_start(void) * - main_fw_load_offset * - main fw size in manifest */ - return (uintptr_t)z_soc_uncached_ptr((__sparse_force void __sparse_cache *) + return (uintptr_t)sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *) ROUND_UP(IMR_L3_HEAP_BASE, L3_MEM_PAGE_SIZE)); } @@ -146,7 +146,7 @@ static bool is_l3_heap_pointer(void *ptr) uintptr_t l3_heap_end = l3_heap_start + get_l3_heap_size(); if (is_cached(ptr)) - ptr = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)ptr); + ptr = sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *)ptr); if ((POINTER_TO_UINT(ptr) >= l3_heap_start) && (POINTER_TO_UINT(ptr) < l3_heap_end)) return true; @@ -199,7 +199,7 @@ static void __sparse_cache *heap_alloc_aligned_cached(struct k_heap *h, #ifdef CONFIG_SOF_ZEPHYR_HEAP_CACHED if (ptr) - ptr = z_soc_cached_ptr((__sparse_force void *)ptr); + ptr = sys_cache_cached_ptr_get((__sparse_force void *)ptr); #endif return ptr; @@ -212,7 +212,7 @@ static void heap_free(struct k_heap *h, void *mem) void *mem_uncached; if (is_cached(mem)) { - mem_uncached = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)mem); + mem_uncached = sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *)mem); sys_cache_data_flush_and_invd_range(mem, sys_heap_usable_size(&h->heap, mem_uncached)); From 89ebbea3ea4d0e8ad91ce40e9b5fc1d15ed85bbc Mon Sep 17 00:00:00 2001 From: Dmitrii Golovanov Date: Wed, 14 Feb 2024 15:05:37 +0100 Subject: [PATCH 08/14] zephyr: app: scripts: intel_adsp: change board names to HWMv2 Change `intel_adsp` board names to HWMv2 scheme: `intel_adsp_cavs25` --> `intel_adsp/cavs25` `intel_adsp_ace15_mtpm` --> `intel_adsp/ace15_mtpm` `intel_adsp_ace20_lnl` --> `intel_adsp/ace20_lnl` Signed-off-by: Dmitrii Golovanov --- app/sample.yaml | 12 ++++++------ scripts/xtensa-build-zephyr.py | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/app/sample.yaml b/app/sample.yaml index f370e42ac8aa..fd7c7c2b31fc 100644 --- a/app/sample.yaml +++ b/app/sample.yaml @@ -11,18 +11,18 @@ tests: tags: sof build_only: true platform_allow: - - intel_adsp_cavs25 - - intel_adsp_ace15_mtpm - - intel_adsp_ace20_lnl + - intel_adsp/cavs25 + - intel_adsp/ace15_mtpm + - intel_adsp/ace20_lnl - nxp_adsp_imx8 - nxp_adsp_imx8x - nxp_adsp_imx8m - nxp_adsp_imx8ulp integration_platforms: - - intel_adsp_cavs25 # TGL - - intel_adsp_ace15_mtpm # MTL - - intel_adsp_ace20_lnl + - intel_adsp/cavs25 # TGL + - intel_adsp/ace15_mtpm # MTL + - intel_adsp/ace20_lnl - nxp_adsp_imx8 - nxp_adsp_imx8x - nxp_adsp_imx8m diff --git a/scripts/xtensa-build-zephyr.py b/scripts/xtensa-build-zephyr.py index e778009eff5f..e9ccc2248cda 100755 --- a/scripts/xtensa-build-zephyr.py +++ b/scripts/xtensa-build-zephyr.py @@ -90,7 +90,7 @@ class PlatformConfig: platform_configs_all = { # Intel platforms "tgl" : PlatformConfig( - "intel", "intel_adsp_cavs25", + "intel", "intel_adsp/cavs25", f"RG-2017.8{xtensa_tools_version_postfix}", "cavs2x_LX6HiFi3_2017_8", "xcc", @@ -98,7 +98,7 @@ class PlatformConfig: ipc4 = True ), "tgl-h" : PlatformConfig( - "intel", "intel_adsp_cavs25_tgph", + "intel", "intel_adsp/cavs25/tgph", f"RG-2017.8{xtensa_tools_version_postfix}", "cavs2x_LX6HiFi3_2017_8", "xcc", @@ -106,14 +106,14 @@ class PlatformConfig: ipc4 = True ), "mtl" : PlatformConfig( - "intel", "intel_adsp_ace15_mtpm", + "intel", "intel_adsp/ace15_mtpm", f"RI-2022.10{xtensa_tools_version_postfix}", "ace10_LX7HiFi4_2022_10", aliases = ['arl', 'arl-s'], ipc4 = True ), "lnl" : PlatformConfig( - "intel", "intel_adsp_ace20_lnl", + "intel", "intel_adsp/ace20_lnl", f"RI-2022.10{xtensa_tools_version_postfix}", "ace10_LX7HiFi4_2022_10", ipc4 = True From ba093e672658d2b19e8514232751a17261494b8a Mon Sep 17 00:00:00 2001 From: Dmitrii Golovanov Date: Thu, 22 Feb 2024 14:10:06 +0100 Subject: [PATCH 09/14] zephyr: intel_adsp: Change ACE SoC name to HWMv2 SoC series ACE changes its name to align with HWMv2 new naming conventions: SOC_SERIES_INTEL_ACE --> SOC_SERIES_INTEL_ADSP_ACE Signed-off-by: Dmitrii Golovanov --- src/audio/base_fw.c | 6 +++--- src/ipc/CMakeLists.txt | 2 +- src/ipc/ipc4/helper.c | 2 +- zephyr/CMakeLists.txt | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/audio/base_fw.c b/src/audio/base_fw.c index cd9b3b00dece..3940672396bb 100644 --- a/src/audio/base_fw.c +++ b/src/audio/base_fw.c @@ -13,7 +13,7 @@ #include #include #include -#if defined(CONFIG_SOC_SERIES_INTEL_ACE) +#if defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE) #include #endif @@ -24,7 +24,7 @@ #include /* TODO: Remove platform-specific code, see https://github.com/thesofproject/sof/issues/7549 */ -#if defined(CONFIG_SOC_SERIES_INTEL_ACE) || defined(CONFIG_INTEL_ADSP_CAVS) +#if defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE) || defined(CONFIG_INTEL_ADSP_CAVS) # define INTEL_ADSP 1 #endif @@ -421,7 +421,7 @@ static int basefw_power_state_info_get(uint32_t *data_offset, char *data) static int fw_config_set_force_l1_exit(const struct sof_tlv *tlv) { -#if defined(CONFIG_SOC_SERIES_INTEL_ACE) +#if defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE) const uint32_t force = tlv->value[0]; if (force) { diff --git a/src/ipc/CMakeLists.txt b/src/ipc/CMakeLists.txt index 8fc26acb7e3f..bcae454871b4 100644 --- a/src/ipc/CMakeLists.txt +++ b/src/ipc/CMakeLists.txt @@ -19,7 +19,7 @@ zephyr_library_sources( dma-copy.c ) -if (CONFIG_SOC_SERIES_INTEL_CAVS_V25 OR CONFIG_SOC_SERIES_INTEL_ACE) +if (CONFIG_SOC_SERIES_INTEL_CAVS_V25 OR CONFIG_SOC_SERIES_INTEL_ADSP_ACE) zephyr_library_sources( ipc-zephyr.c ) diff --git a/src/ipc/ipc4/helper.c b/src/ipc/ipc4/helper.c index a7652e93550d..10c5a06874ef 100644 --- a/src/ipc/ipc4/helper.c +++ b/src/ipc/ipc4/helper.c @@ -25,7 +25,7 @@ #include /* TODO: Remove platform-specific code, see https://github.com/thesofproject/sof/issues/7549 */ -#if defined(CONFIG_SOC_SERIES_INTEL_ACE) || defined(CONFIG_INTEL_ADSP_CAVS) +#if defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE) || defined(CONFIG_INTEL_ADSP_CAVS) #define RIMAGE_MANIFEST 1 #endif diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 7234bbda2bfa..281077fb3e3f 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -178,7 +178,7 @@ if (CONFIG_SOC_SERIES_INTEL_CAVS_V25) endif() # Intel ACE 1.5 and newer platforms -if (CONFIG_SOC_SERIES_INTEL_ACE) +if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE) # Platform sources zephyr_library_sources( From 3e70d036a2df94b854add51742681b64ea0df729 Mon Sep 17 00:00:00 2001 From: Iuliana Prodan Date: Wed, 28 Feb 2024 10:16:27 +0200 Subject: [PATCH 10/14] zephyr: sof: update board name for HWMv2 Update NXP board names and configs with the ones for HWMv2. Signed-off-by: Iuliana Prodan --- ..._imx8m.conf => imx8mp_evk_mimx8ml8_adsp.conf} | 0 ...p_imx8.conf => imx8qm_mek_mimx8qm6_adsp.conf} | 0 ....overlay => imx8qm_mek_mimx8qm6_adsp.overlay} | 0 ...imx8x.conf => imx8qxp_mek_mimx8qx6_adsp.conf} | 0 ...overlay => imx8qxp_mek_mimx8qx6_adsp.overlay} | 0 ...mx8ulp.conf => imx8ulp_evk_imx8ulp_adsp.conf} | 0 app/sample.yaml | 16 ++++++++-------- scripts/xtensa-build-zephyr.py | 8 ++++---- zephyr/CMakeLists.txt | 6 +++--- 9 files changed, 15 insertions(+), 15 deletions(-) rename app/boards/{nxp_adsp_imx8m.conf => imx8mp_evk_mimx8ml8_adsp.conf} (100%) rename app/boards/{nxp_adsp_imx8.conf => imx8qm_mek_mimx8qm6_adsp.conf} (100%) rename app/boards/{nxp_adsp_imx8.overlay => imx8qm_mek_mimx8qm6_adsp.overlay} (100%) rename app/boards/{nxp_adsp_imx8x.conf => imx8qxp_mek_mimx8qx6_adsp.conf} (100%) rename app/boards/{nxp_adsp_imx8x.overlay => imx8qxp_mek_mimx8qx6_adsp.overlay} (100%) rename app/boards/{nxp_adsp_imx8ulp.conf => imx8ulp_evk_imx8ulp_adsp.conf} (100%) diff --git a/app/boards/nxp_adsp_imx8m.conf b/app/boards/imx8mp_evk_mimx8ml8_adsp.conf similarity index 100% rename from app/boards/nxp_adsp_imx8m.conf rename to app/boards/imx8mp_evk_mimx8ml8_adsp.conf diff --git a/app/boards/nxp_adsp_imx8.conf b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf similarity index 100% rename from app/boards/nxp_adsp_imx8.conf rename to app/boards/imx8qm_mek_mimx8qm6_adsp.conf diff --git a/app/boards/nxp_adsp_imx8.overlay b/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay similarity index 100% rename from app/boards/nxp_adsp_imx8.overlay rename to app/boards/imx8qm_mek_mimx8qm6_adsp.overlay diff --git a/app/boards/nxp_adsp_imx8x.conf b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf similarity index 100% rename from app/boards/nxp_adsp_imx8x.conf rename to app/boards/imx8qxp_mek_mimx8qx6_adsp.conf diff --git a/app/boards/nxp_adsp_imx8x.overlay b/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay similarity index 100% rename from app/boards/nxp_adsp_imx8x.overlay rename to app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay diff --git a/app/boards/nxp_adsp_imx8ulp.conf b/app/boards/imx8ulp_evk_imx8ulp_adsp.conf similarity index 100% rename from app/boards/nxp_adsp_imx8ulp.conf rename to app/boards/imx8ulp_evk_imx8ulp_adsp.conf diff --git a/app/sample.yaml b/app/sample.yaml index fd7c7c2b31fc..4a1978cde083 100644 --- a/app/sample.yaml +++ b/app/sample.yaml @@ -14,16 +14,16 @@ tests: - intel_adsp/cavs25 - intel_adsp/ace15_mtpm - intel_adsp/ace20_lnl - - nxp_adsp_imx8 - - nxp_adsp_imx8x - - nxp_adsp_imx8m - - nxp_adsp_imx8ulp + - imx8qm_mek/mimx8qm6/adsp + - imx8qxp_mek/mimx8qx6/adsp + - imx8mp_evk/mimx8ml8/adsp + - imx8ulp_evk/imx8ulp/adsp integration_platforms: - intel_adsp/cavs25 # TGL - intel_adsp/ace15_mtpm # MTL - intel_adsp/ace20_lnl - - nxp_adsp_imx8 - - nxp_adsp_imx8x - - nxp_adsp_imx8m - - nxp_adsp_imx8ulp + - imx8qm_mek/mimx8qm6/adsp + - imx8qxp_mek/mimx8qx6/adsp + - imx8mp_evk/mimx8ml8/adsp + - imx8ulp_evk/imx8ulp/adsp diff --git a/scripts/xtensa-build-zephyr.py b/scripts/xtensa-build-zephyr.py index e9ccc2248cda..22980d59fbcb 100755 --- a/scripts/xtensa-build-zephyr.py +++ b/scripts/xtensa-build-zephyr.py @@ -121,25 +121,25 @@ class PlatformConfig: # NXP platforms "imx8" : PlatformConfig( - "imx", "nxp_adsp_imx8", + "imx", "imx8qm_mek/mimx8qm6/adsp", f"RI-2023.11{xtensa_tools_version_postfix}", "hifi4_nxp_v5_3_1_prod", RIMAGE_KEY = "key param ignored by imx8", ), "imx8x" : PlatformConfig( - "imx", "nxp_adsp_imx8x", + "imx", "imx8qxp_mek/mimx8qx6/adsp", f"RI-2023.11{xtensa_tools_version_postfix}", "hifi4_nxp_v5_3_1_prod", RIMAGE_KEY = "key param ignored by imx8x" ), "imx8m" : PlatformConfig( - "imx", "nxp_adsp_imx8m", + "imx", "imx8mp_evk/mimx8ml8/adsp", f"RI-2023.11{xtensa_tools_version_postfix}", "hifi4_mscale_v2_0_2_prod", RIMAGE_KEY = "key param ignored by imx8m" ), "imx8ulp" : PlatformConfig( - "imx", "nxp_adsp_imx8ulp", + "imx", "imx8ulp_evk/imx8ulp/adsp", f"RI-2023.11{xtensa_tools_version_postfix}", "hifi4_nxp2_s7_v2_1a_prod", RIMAGE_KEY = "key param ignored by imx8ulp" diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 281077fb3e3f..176e41314d65 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -232,7 +232,7 @@ if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE) endif() # NXP IMX8 platforms -if (CONFIG_SOC_SERIES_NXP_IMX8) +if (CONFIG_SOC_MIMX8QM_ADSP OR CONFIG_SOC_MIMX8QXP_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/generic/dummy-dma.c ${SOF_DRIVERS_PATH}/imx/edma.c @@ -261,7 +261,7 @@ if (CONFIG_SOC_SERIES_NXP_IMX8) set(PLATFORM "imx8") endif() -if (CONFIG_SOC_SERIES_NXP_IMX8M) +if (CONFIG_SOC_MIMX8MP_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/generic/dummy-dma.c ${SOF_DRIVERS_PATH}/imx/sdma.c @@ -290,7 +290,7 @@ if (CONFIG_SOC_SERIES_NXP_IMX8M) set(PLATFORM "imx8m") endif() -if (CONFIG_SOC_SERIES_NXP_IMX8ULP) +if (CONFIG_SOC_MIMX8ULP_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/generic/dummy-dma.c ${SOF_DRIVERS_PATH}/imx/edma.c From aea02f4a715aedee74e1da876ce8e360f958f95a Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Thu, 14 Mar 2024 13:23:25 +0200 Subject: [PATCH 11/14] nxp: imx8ulp: change SOC name to MIMX8UD7 Zephyr PR#70219 changes i.MX8ULP's SOC name to MIMX8UD7. As such, we need to update the board configuration file and the SOC name inside `xtensa-build-zephyr.py` to use the new SOC name. Signed-off-by: Laurentiu Mihalcea --- ...p_evk_imx8ulp_adsp.conf => imx8ulp_evk_mimx8ud7_adsp.conf} | 0 app/sample.yaml | 4 ++-- scripts/xtensa-build-zephyr.py | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) rename app/boards/{imx8ulp_evk_imx8ulp_adsp.conf => imx8ulp_evk_mimx8ud7_adsp.conf} (100%) diff --git a/app/boards/imx8ulp_evk_imx8ulp_adsp.conf b/app/boards/imx8ulp_evk_mimx8ud7_adsp.conf similarity index 100% rename from app/boards/imx8ulp_evk_imx8ulp_adsp.conf rename to app/boards/imx8ulp_evk_mimx8ud7_adsp.conf diff --git a/app/sample.yaml b/app/sample.yaml index 4a1978cde083..5a4611b71449 100644 --- a/app/sample.yaml +++ b/app/sample.yaml @@ -17,7 +17,7 @@ tests: - imx8qm_mek/mimx8qm6/adsp - imx8qxp_mek/mimx8qx6/adsp - imx8mp_evk/mimx8ml8/adsp - - imx8ulp_evk/imx8ulp/adsp + - imx8ulp_evk/mimx8ud7/adsp integration_platforms: - intel_adsp/cavs25 # TGL @@ -26,4 +26,4 @@ tests: - imx8qm_mek/mimx8qm6/adsp - imx8qxp_mek/mimx8qx6/adsp - imx8mp_evk/mimx8ml8/adsp - - imx8ulp_evk/imx8ulp/adsp + - imx8ulp_evk/mimx8ud7/adsp diff --git a/scripts/xtensa-build-zephyr.py b/scripts/xtensa-build-zephyr.py index 22980d59fbcb..3eb35b4d6f26 100755 --- a/scripts/xtensa-build-zephyr.py +++ b/scripts/xtensa-build-zephyr.py @@ -139,7 +139,7 @@ class PlatformConfig: RIMAGE_KEY = "key param ignored by imx8m" ), "imx8ulp" : PlatformConfig( - "imx", "imx8ulp_evk/imx8ulp/adsp", + "imx", "imx8ulp_evk/mimx8ud7/adsp", f"RI-2023.11{xtensa_tools_version_postfix}", "hifi4_nxp2_s7_v2_1a_prod", RIMAGE_KEY = "key param ignored by imx8ulp" From 1c1dd3d83d85c3bd2bfd16f6d5bb101e764cb698 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Thu, 21 Mar 2024 13:22:57 +0200 Subject: [PATCH 12/14] zephyr: CMakeLists.txt: use new `CONFIG_SOC_` for 8ULP Zephyr PR#70219 changes the SOC name of i.MX8ULP from MIMX8ULP to MIMX8UD7. This means that all `CONFIG_SOC_*` configurations will be changed from the `MIMX8ULP`-based naming to the `MIMX8UD7`-based naming. As such, this commit updates the name of the configuration used by the `zephyr/CMakeLists.txt` file. Signed-off-by: Laurentiu Mihalcea --- zephyr/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 176e41314d65..7948f1f5074c 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -290,7 +290,7 @@ if (CONFIG_SOC_MIMX8MP_ADSP) set(PLATFORM "imx8m") endif() -if (CONFIG_SOC_MIMX8ULP_ADSP) +if (CONFIG_SOC_MIMX8UD7_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/generic/dummy-dma.c ${SOF_DRIVERS_PATH}/imx/edma.c From c11a3185afbc8e1b2a79916de3dfefaf326d9ad1 Mon Sep 17 00:00:00 2001 From: Iuliana Prodan Date: Wed, 27 Mar 2024 03:05:32 +0200 Subject: [PATCH 13/14] zephyr: sof: update configs for NXP ADSP CONFIG_SOC_ has changed in zephyr in order to match soc name. Threfore, update configs with new values. Signed-off-by: Iuliana Prodan --- zephyr/CMakeLists.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 7948f1f5074c..cba25b672733 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -232,7 +232,7 @@ if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE) endif() # NXP IMX8 platforms -if (CONFIG_SOC_MIMX8QM_ADSP OR CONFIG_SOC_MIMX8QXP_ADSP) +if (CONFIG_SOC_MIMX8QM6_ADSP OR CONFIG_SOC_MIMX8QX6_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/generic/dummy-dma.c ${SOF_DRIVERS_PATH}/imx/edma.c @@ -261,7 +261,7 @@ if (CONFIG_SOC_MIMX8QM_ADSP OR CONFIG_SOC_MIMX8QXP_ADSP) set(PLATFORM "imx8") endif() -if (CONFIG_SOC_MIMX8MP_ADSP) +if (CONFIG_SOC_MIMX8ML8_ADSP) zephyr_library_sources( ${SOF_DRIVERS_PATH}/generic/dummy-dma.c ${SOF_DRIVERS_PATH}/imx/sdma.c @@ -318,7 +318,7 @@ if (CONFIG_SOC_MIMX8UD7_ADSP) set(PLATFORM "imx8ulp") endif() -if (CONFIG_SOC_SERIES_MIMX9_A55) +if (CONFIG_SOC_MIMX9352_A55) # Platform sources zephyr_library_sources( ${SOF_PLATFORM_PATH}/imx93_a55/platform.c From 8ca7b6a6ce89b0478259c14da0a4d82b94565e63 Mon Sep 17 00:00:00 2001 From: Yong Cong Sin Date: Thu, 7 Dec 2023 15:20:21 +0800 Subject: [PATCH 14/14] build: namespace the generated headers with `zephyr/`` Zephyr's build time generated headers are now in the `zephyr` to provide proper namespace, update the path accordingly. See ZephyrProject upstream PR at: zephyrproject-rtos/zephyr#63973 Signed-off-by: Yong Cong Sin --- src/init/init.c | 2 +- src/ipc/ipc-zephyr.c | 2 +- src/trace/dma-trace.c | 2 +- zephyr/lib/alloc.c | 2 +- zephyr/lib/cpu.c | 2 +- zephyr/wrapper.c | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/init/init.c b/src/init/init.c index cdfa2b6ef794..af854921271d 100644 --- a/src/init/init.c +++ b/src/init/init.c @@ -38,7 +38,7 @@ #include #include #include -#include +#include #endif #include diff --git a/src/ipc/ipc-zephyr.c b/src/ipc/ipc-zephyr.c index 49a448850a99..aa46baec36f3 100644 --- a/src/ipc/ipc-zephyr.c +++ b/src/ipc/ipc-zephyr.c @@ -9,7 +9,7 @@ // Andrey Borisovich // Adrian Warecki -#include +#include #include #include diff --git a/src/trace/dma-trace.c b/src/trace/dma-trace.c index 9d4351c8e8d0..f8aa1c2f96ff 100644 --- a/src/trace/dma-trace.c +++ b/src/trace/dma-trace.c @@ -29,7 +29,7 @@ #include #ifdef __ZEPHYR__ -#include +#include #endif #include diff --git a/zephyr/lib/alloc.c b/zephyr/lib/alloc.c index ce0dd5401853..31344c972fd6 100644 --- a/zephyr/lib/alloc.c +++ b/zephyr/lib/alloc.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include diff --git a/zephyr/lib/cpu.c b/zephyr/lib/cpu.c index 9424cdc140e2..ee38cc1a164b 100644 --- a/zephyr/lib/cpu.c +++ b/zephyr/lib/cpu.c @@ -17,7 +17,7 @@ #include /* Zephyr includes */ -#include +#include #include #include #include diff --git a/zephyr/wrapper.c b/zephyr/wrapper.c index 0d4644ffdfb2..d912e3d8aba2 100644 --- a/zephyr/wrapper.c +++ b/zephyr/wrapper.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include #include #include #include